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document number: mc33901 rev. 1.0, 12/2013 freescale semiconductor ? advance information * this document contains certain information on a new product. ? specifications and information herein are subject to change without notice. ? freescale semiconductor, in c., 2013. all rights reserved. high speed can transceiver the mc33901/34901 are high speed can transceivers providing the physical interface between the can pr otocol controller of an mcu and the physical dual wires can bus. they are packaged in an 8 pin soic with market standard pin out, and offer excellent emc and esd performance without the need for external filter components. four devices variations are available: - versions with and without can bus wake-up. - versions with and without txd dominant protection. features ? very low current consumption in standby mode ? automatic adaptation to 3.3 or 5.0 v mcu communication ? standby mode with remote can wake-up on some versions. ? pin and function compatible with market standard cost efficient robustness: ? high system level esd performance ? very high electromagnetic imm unity and low electromagnetic emission without common mode choke or other external components. fail-safe behaviors: ? txd dominant timeout, on the mc33901 version. ? ideal passive when unpowered, can bus leakage current <10 ? a. ? vdd and vio monitoring figure 1. simplified application diagram high speed can transceiver 33901 34901 . industrial applications (MC34901) ? transportation ? backplanes ? lift/elevators ? factory automation ? industrial process control automotive applic ations (mc33901) ? supports automotive can high-speed applications ? body electronics ? power train ? chassis and safety ? infotainment ? diagnostic equipment ? accessories ef suffix (pb-free) 98asb42564b 8-pin soicn vdd vio txd rxd can h can l tx mcu 33901 i/o rx v pwr can controller protocol vcc vreg 5.0 v 3.3 v gnd 3.3 v 5.0 v 120 ? can bus stb 34901
analog integrated circuit device data ? freescale semiconductor 2 33901 table of contents 1 orderable parts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 internal block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 3 pin connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 3.1 pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 3.2 pin definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 3.3 maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 3.4 thermal characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 3.5 operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 4 general ic functional description and application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 4.1 introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 4.2 pin function and description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 4.3 operating modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 4.4 fail-safe mechanisms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 4.5 device operation summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 4.6 electrical chatacteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 5 typical applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 5.1 application diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 6 packaging . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 6.1 package mechanical dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 7 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
analog integrated circuit device data ? freescale semiconductor 3 33901 1 orderable parts this section describes the part numbers availa ble to be purchased along with their differences. valid orderable part numbers are provided on the web. to determine the orderable part numbers for this device, go to http:// www.freescale.com and perform a part number search. table 1. orderable part variations part number (1) temperature (t a ) package wake-up function txd dominant protection mc33901wef -40 to 125 c soic 8 pins available available mc33901sef not available MC34901wef available not available MC34901sef not available notes 1. to order parts in tape & reel, add the r2 suffix to the part number.
analog integrated circuit device data ? freescale semiconductor 4 33901 2 internal block diagram figure 2. internal block diagram vdd gnd rin rin 2.5v mode control differential receiver wake-up receiver (*) pre driver txd can h can l v io rxd stb vio over- time out temperature bus biasing and vio monitor v io v io vdd monitor v io v io v dd v dd v dd (*) mc3x901wef only high impedance pre driver 50k buffer input mc33xx only
analog integrated circuit device data ? freescale semiconductor 5 33901 3 pin connections 3.1 pinout figure 1. 8- pin soic pinout 3.2 pin definitions a functional description of each pin can be found in the functional pin description section beginning on page 8 . table 2. 33901 pin definitions pin number pin name pin function definition 1 txd input can bus transmit data input pin 2 gnd ground ground 3 vdd input 5.0 v input supply for can driver and receiver 4 rxd output can bus receive data output pin 5 vio input input supply for the digital input output pins 6 can l input/output can bus low pin 7 can h input/output can bus high pin 8 stb input standby input for device mode selection 4 2 3 8 5 7 6 1 canh canl vio txd gnd vdd rxd stb
analog integrated circuit device data ? freescale semiconductor 6 33901 3.3 maximum ratings table 3. maximum ratings all voltages are with respect to ground unless otherwise noted. exceeding these ratings may caus e a malfunction or permanent damage to the device. symbol description (rating) min. max. unit notes electrical ratings v dd v dd logic supply voltage -0.3 7.0 v v io input/output logic voltage -0.3 7.0 v v stb standby pin input voltage -0.3 7.0 v v txd txd maximum voltage range -0.3 7.0 v v rxd rxd maximum voltage range -0.3 7.0 v v canh canh bus pin maximum range -27 40 v v canl canl bus pin maximum range -27 40 v v esd esd voltage ? human body model (hbm) (all pi ns except canh and canl pins) ? human body model (hbm) (canh, canl pins) ? machine model (mm) ? charge device model (cdm)(/corners pins) ? system level esd ? 330 ? / 150 pf unpowered according to iec61000-4-2: ? 330 ? / 150 pf unpowered according to oem lin, can, flexray conformance ?2.0 k ? / 150 pf unpowered according to iso10605.2008 ?2.0 k ? / 330 pf powered according to iso10605.2008 2000 8000 200 500(/750) 8.0 6.0 8.0 6.0 v kv (2) notes 2. esd testing is performed in accordance with the human body model (hbm) (c zap = 100 pf, r zap = 1500 ? ), the machine model (mm) (c zap = 200 pf, r zap = 0 ? ), and the charge device model.
analog integrated circuit device data ? freescale semiconductor 7 33901 3.4 thermal characteristics 3.5 operating conditions this section describes the operating condit ions of the device. conditions apply to all the following data, unless otherwise not ed. figure 3. supply voltage operating range table 4. thermal ratings symbol description (rating) min. max. unit notes thermal ratings t a t j operating temperature ? ambient ? junction -40 -40 125 150 c t stg storage temperature -55 150 c t pprt peak package reflow temperature during reflow ? ? c thermal resistance and package dissipation ratings r ? ja junction-to-ambient, natural c onvection, single-layer board ? 140 c/w t sd thermal shutdown 150 ? c t sdh thermal shutdown hysteresis ? 15 c table 5. operating conditions all voltages are with respect to ground unless otherwise noted. exceeding these ratings may caus e a malfunction or permanent damage to the device. symbol ratings min max unit notes v dd_f functional operating v dd voltage v dd_uv 7.0 v v dd_op parametric operating v dd voltage 4.5 5.5 v v io_f functional operating v io voltage v io_uv 7.0 v v io_op parametric operating v io voltage 2.8 5.5 v 7.0 v 5.5 v 5.0 v 4.5 v vdd operating range device in standby mode device functional max rating exceeded 7.0 v 5.5 v 5.0 v 2.8 v vio operating range device functional max rating exceeded 3.3 v 0v 0v can bus recessive state v dd uv device functional or can bus recessive state device functional or device in unpowered mode v io uv vdd vio
analog integrated circuit device data ? freescale semiconductor 8 33901 4 general ic functional de scription and application information 4.1 introduction the 33901/34901 are high speed can transceivers providing the ph ysical interface between the can protocol controller of an mcu and the physical dual wires can bus. they are packaged in an 8 pin soic with market standard pin out, and offer excellent emc and esd performance without the need for external filter components. they meet the iso 11898-2 and iso11898-5 standards, and have low leakage on can bus while unpowered. the devices are supplied from v dd and vio, to allow automati c operation with 5.0 and 3.3 v microcontrollers. they are offered in four versions: with and without ca n bus wake-up, and with and wi thout txd dominant time out. 4.2 pin function and description 4.2.1 vdd power supply this is the supply for the canh and canl bus drivers, the bus differential receiver and the bus biasing voltage circuitry. vdd is monitored for under voltage conditions. see fail-safe mechanisms . when the device is in standby mode, the consum ption on vdd is extremely low (refer to ivdd ). 4.2.2 vio digital i/o power supply this is the supply for the txd, rxd, and stb digital input outputs pins. vio al so supplies the low power differential wake-up receivers and filter circuitry. this allo ws detecting and reporting bus wake-up event s with device supplied only from vio. vio is monitored for undervoltage conditions. see fail-safe mechanisms . when the device is in standby mode, the cons umption on vio is extremely low (refer to ivio ). 4.2.3 stb stb is the input pin to control the device mode. when stb is high or floating, the device is in standby mode. when stb is low, the device is set in normal mode. stb has an internal pull-up to v io, so if stb is left open, the device is set to a predetermi ned standby mode. 4.2.4 txd txd is the device input pin to control the can bus level. in the application, this pin is connect ed to the microcontroller tran smit terminal. in normal mode, when txd is high or floating, the canh and canl drivers are off, setting the bus in a re cessive state. when txd is low, the canh and canl drivers are activated and t he bus is set to a dominant st ate. txd has a built-in timing protection that disables the bus w hen txd is dominant for more than tx dom . in standby mode, txd has no effect on the device. the txd dominant protection is availabl e on 33901, but not available on 34901.
analog integrated circuit device data ? freescale semiconductor 9 33901 4.2.5 rxd rxd is the bus output level report pin. in the application, th is pin is connected to the mi crocontroller receive terminal. in normal mode, rxd is a push-pull structur e. when the bus is in a recessive state, rxd is high. when the bus is dominant, rxd is low. in standby mode, the push-pull structure is disa bled, rxd is pulled up to vio via a resistor ( r pu-rxd ), and is in a high level. when the bus wake-up is detected, the push-pull structure re sumes and txd reports a wake-up via a toggling mechanism (refer to figure 7 ). the toggling mechanism for bus wake-up reports is avai lable on the mc33901wef. this mechanism is not available on the mc33901sef. 4.2.6 canh and canl these are the can bus terminals. canl is a low side driver to gnd, and canh is a high side dr iver to vdd. in normal mode and txd high, the canh and canl drivers are off, and the voltage at canh and canl is approx. 2.5 v, provided by the internal bus biasing circuitry. when txd is low, canl is pulled to gnd and canh to vdd, creating a differential voltage on the can bus. in standby mode, canh and canl drivers are off, and these pins are pulled down to gnd via the device r in resistor for the mc3x901wef versions (ref to parameter input resistance ). in device unpowered mode, ca nh and canl are high-impedance with extremely low leakage to gnd, making the device ideally passive when unpowered. canh and canl have integrated esd protecti on and extremely high robustness versus ex ternal disturbance, such as emc and electrical transients. these pins have current limitation an d thermal protection. 4.3 operating modes the device has two operating modes: standby and normal. 4.3.1 normal mode this mode is selected when the stb pin is low. in this mode, th e device is able to transmit information from txd to the bus and report the bus level to the rxd pin. when txd is high, canh and canl drivers are off and the bus is in the recessive state (unless it is in an application where another device drives the bus to the dominant state). when txd is low, canh and canl drivers are on and the bus is in the dominant state. 4.3.2 standby mode this mode is selected when the stb pin is hi gh or floating. in this mode, the device is not able to transmit information from t xd to the bus, and it cannot report accurate bus information. t he device can only report bus wake up events via the rxd toggling mechanism. the bus wake-up report is available on the mc3x901wef. this feature is not available on the mc3x901sef. in standby mode, the consumption from vdd and vio is extremely low. in this mode, the canh and canl pins are pulled down to gnd via the internal r in resistor, for device versions mc33901wef and MC34901wef. 4.3.2.1 wake-up mechanism the device versions mc3x901wef include bus monitoring circuitry to detect and report bus wake-ups. to activate a wake-up report, three events must occur on the can bus: - event 1: a dominant level for a time longer than t wu_flt1 followed by - event 2: a recessive level (event 2) longer than t wu_flt2 followed by - event 3: a dominant level (event 3) longer than t wu_flt2 . the rxd terminal will then report the bus state (bus dominant => rxd low, bus recessive => rxd high). the delay between bus dominant and rxd low, and bus recessive and rxd high is longer than in normal mode (refer to t tglt ).
analog integrated circuit device data ? freescale semiconductor 10 33901 the three events must occur within the t wu_to timeout. figure 7 ? wake-up pattern timing illustration ? illustrates the wake-up detection and reporting (toggling) mechanism. if the three events do not occur within the t wu_to timeout, the wake-up and toggling mechan ism are not active. this is illustrated in figure 8 . the three events and the timeout function avoid a permanent dom inant state on the bus that wo uld generate a permanent wake- up situation, which would prevent the system from entering low power mode. 4.3.3 unpowered mode when vio is below vio uv, the device is in unpowered mode. the can bus will be in high-impedance and the device is not able to transmit, receive, or report bus wake-up events. 4.4 fail-safe mechanisms the device implements various pr otection, detection, and predictable fail-safe mechanisms. 4.4.1 stb and txd input pins the stb input pin has an internal integrated pull-up structure to the vio supply pin. if stb is open, the device is set to stan dby mode to ensure predictable behavior and mi nimize system current consumption. the txd input pin also has an internal inte grated pull-up structure to the vio supply pi n. if txd is open, the can driver is se t to the recessive state to minimize current consumption and ensure that no false dominant bit is transmitted on the bus. 4.4.2 txd dominant time out detection if txd is set low for a time longer than the tx dom parameter, the can drivers are disabled and the can bus will return to recessive state. this prevents the bus from being set to the dominant state permanently in case a fault sets the txd input to low level permanently. the device will recover from this when a high level is detected on txd. refer to figures 9 . 4.4.3 can current limitation the current flowing in and out of the canh an d canl driver is limited to a maximum of 100 ma, in case of a short-circuit (parameter for i lim ). 4.4.4 can overtemperature if the driver temperature exceeds tsd , the driver will be turned off to protect the device. a hysteresis is implemented in this protection feature. the devic e overtemperature and recovery conditions are shown in overtemperature behavior . the driver remains disabled until the temperature has fallen below the ot threshold minus the hysteresis and a txd high to low transition is detected.
analog integrated circuit device data ? freescale semiconductor 11 33901 figure 4. overtemperature behavior 4.4.5 vdd and vio supply voltage monitoring the device monitors the v dd and vio supply inputs. if vdd falls below vdd uv ( vdd_uv ), the device is set in standby mode. this en sures a predictable behavior due to the loss of vdd. can driver, receiver, or bus biasing cannot operate any lo nger. in this case, the bus wake-up is available as vio remai ns active. if vio falls below vio uv ( vio_uv ), the device is set to an unpowered condition. this ensures a predictable behavior due to the loss of vio, can driver, receiver, or bus biasing can not operate any longer. this se ts the bus in high-impedance and in ideal passive behavior. 4.4.6 bus dominant state behavior in standby mode in device standby mode, a bus dominant condition due, for instanc e to a short-circuit or a fault in one of the other can nodes, will not generate a permanent wake-up event, by virtue of the multiple events (dom inant, recessive, dominant) and timeout required to detect and report bus wake-ups. txd high low dominant recessive event 1 bus temperature hysteresis event 1: overtemperature detection. can driver disable. event 2: temperature falls below ?overtemp. thresh old minus hysteresis? => can driver remains disable. event 2 dominant event 1 hysteresis event 2 dominant event 3 event 3: temperature below ?overtemp. threshold minus h ysteresis? and txd high to low transition => can driver enable. event 4 event 4: temperature above ?overtemp. threshold minus hysteres is? and txd high to low transition => can driver remains disable. event 3 overtemperature threshold
analog integrated circuit device data ? freescale semiconductor 12 33901 4.5 device operation summary the following table summarizes the device operation and the stat e of the input output pins, depending on the operating mode and power supply conditions. standby and normal modes mode description vdd range vio range stb txd rxd can wake-up normal nominal supply and normal mode from 4.5 to 5.5 v from 2.8 to 5.5 v low txd high => bus recessive txd low => bus dominant report can state (bus recessive => rxd high, bus dominant => rxd low). canh and canl drivers controlled by txd input. differential receiver report bus state on rxd pins. biasing circui try provides approx 2.5 in recessive state. disabled standby nominal supply and standby mode from 0 to 5.5 v from 2.8 to 5.5 v high or floating no effect. on can bus. report bus wake up via toggling mechanism for mc3x901wef. rxd high level for mc3x901sef can driver and differential receiver disabled. bus biased to gnd via internal r in resistors for mc3x901wef. bus high-impedance for mc3x901sef. enabled on mc33901wef not available on mc33901sef undervoltage and loss of power conditions mode description vdd range vio range stb txd rxd can wake up standby due to vdd loss device in standby mode due to loss of vdd (vdd fall below vdd uv) from 0 to vdd_uv. (4) from 2.8 to 5.5 v (5) x (3) x report bus wake up via toggling mechanism for mc3x901wef. rxd high level for mc3x901sef can driver and differential receiver disabled. bus biased to gnd via internal r in resistors for mc3x901wef. bus high-impedance for mc3x901sef. enabled on mc33901wef not available on mc33901sef. unpowered due to vio loss device in unpowered state due to low vio. can bus high- impedance. (4) from 0 to vio_uv x x pulled up to vio down to vio approx 1.5 v. can driver and differential receiver disabled. high-impedance, with ideal passive behavior. not available. notes 3. stb pin has no effect. device enters in standby mode. 4. vdd consumption < 10 ua down to vdd approx 1.5 v. 5. vio consumption < 10 ua down to vio approx 1.5 v. if stb is high or floating.
analog integrated circuit device data ? freescale semiconductor 13 33901 4.6 electrical chatacteristics table 6. static electri cal characteristics characteristics noted under conditions 4.5 v ? v dd ? 5.5 v, 2.8 v ? v io ? 5.5 v, - 40 ? c ? t a ? 125 ? c, gnd = 0 v, r on can bus (r l ) = 60 ? , unless otherwise noted. typical values not ed reflect the approximate parameter at t a = 25 c under nominal conditions, unless otherwise noted. symbol characteristic min typ max unit notes power input vdd v dd vdd supply voltage range ? nominal operation 4.5 ? 5.5 v v dd_uv vdd under voltage threshold 3.0 ? 4.5 v i vdd vdd supply current ? normal mode, txd high ? normal mode, tx low ? standby mode ? ? ? ? 40 ? 5.0 65 5.0 ma ma a power input vio v io vio supply voltage range ? nominal operation 2.8 ? 5.5 v v io_uv v io under voltage threshold ?? 2.8v i vio vio supply current ? normal mode, txd high ? normal mode, txd low or can bus in dominant state ? standby mode, can bus in recessive state ? standby mode, wake-up filter and wake-up time out running ? ? ? ? ? ? 5 ? 200 1.0 10 150 a ma a a stb input v stb input voltages ? high level input voltage ? low level input voltage ? input threshold hysteresis 0.7 ? 200 ? ? ? ? 0.3 ? vio v mv r pu-stb pull-up resistor to v io ? 100 ? k ? txd input v txd input voltages ? high level input voltage ? low level input voltage ? input threshold hysteresis 0.7 ? 200 ? ? 300 ? 0.3 ? vio v mv r pu-txd pull-up resistor to v io 5.0 ? 50 k ? rxd output i rxd output current ? rxd high, vrxd high = vio - 0.4 v ? rxd low, vrxd high = 0.4 v -5.0 1.0 -2.5 2.5 -1.0 5.0 ma r pu-rxd pull-up resistor to v io (in standby mode, without toggling - no wake-up report) 25 50 90 k ?
analog integrated circuit device data ? freescale semiconductor 14 33901 canl and canh terminals v rec recessive voltage, txd high, no load ? canl recessive voltage ? canh recessive voltage 2.0 2.0 2.5 2.5 3.0 3.0 v v diff_rec canh - canl differential recessive voltage, txd high, no load -50 ? 50 mv v dom dominant voltage, txd low (t < tx dom ), r l = 45 to 65 ? ? canl dominant voltage ? canh dominant voltage 0.5 2.75 ? ? 2.25 4.5 v v diff_dom canh - canl differential dominant voltage, r l = 45 to 65 ??? txd low 1.5 2.0 3.0 v i lim current limitation, txd low (t < tx dom ) ? canl current limitation, canl 5v to 28v ? canh current limitation, canh = 0v 40 -100 ? ? 100 -40 ma v diff_thr canh - canl differential input threshold 0.5 ? 0.9 v v diff_hys canh - canl differential input voltage hysteresis 50 ? 400 mv v diff_thr_s canh - canl differential input threshold, in standby mode 0.4 ? 1.15 v v cm common mode voltage -12 ? 12 v r in input resistance ? canl input resistance ? canh input resistance 5 5 ? ? 50 50 k r in_diff canh, canl differential input resistance 10 ? 100 k ? r in_match input resistance matching -3.0 ? 3.0 % i in_upwr canl or canh input current, device unpowered, vdd = vio = 0 v, vcanl and vcanh 0.0 to 5.0 v range -10 ? 10 a r in_upwr canl, canh input resistance, vcanl = vcanh = ? 12 v 10 ? ? k ? c can_cap canl, canh input capacitance (guaranteed by design and characterization) ?20 ?pf c dif_cap canl, canh differential input c apacitance (guaranteed by design and characterization) ?10 ?pf tsd temperature shutdown 150 185 ? c table 6. static el ectrical characteristics characteristics noted under conditions 4.5 v ? v dd ? 5.5 v, 2.8 v ? v io ? 5.5 v, - 40 ? c ? t a ? 125 ? c, gnd = 0 v, r on can bus (r l ) = 60 ? , unless otherwise noted. typical values not ed reflect the approximate parameter at t a = 25 c under nominal conditions, unless otherwise noted. symbol characteristic min typ max unit notes
analog integrated circuit device data ? freescale semiconductor 15 33901 figure 5. timing test circuit table 7. dynamic electr ical characteristics characteristics noted under conditions 4.5 v ? v dd ? 5.5 v, 2.8 v ? v io ? 5.5 v, - 40 ? c ? t a ? 125 ? c, gnd = 0 v, r on can bus (r l ) = 60 ? , unless otherwise noted. typical values not ed reflect the approximate parameter at t a = 25 c under nominal conditions, unless otherwise noted. timing parameters tx dom txd dom 2.5 ? 16 ms (6) t loop t loop ? ? 255 ns t wu_flt1 twu filter1 0.5 ? 5 s (7) t wu_flt2 twu filter2 0.08 ? 1 s (7) t tglt tdelay during toggling ?? 1.3s (7) t wu_to twake up time out 1.5 ? 7.0 ms (7) t delay_pwr delay between power up and device ready ? 120 300 s t delay_sn transition time from standby to normal mode (stb high to low) 40 us notes 6. mc33901 versions only 7. mc33901wef and MC34901wef versions only mc33901 canh canl rxd txd vio stb vdd gnd 5.0 v 100 nf 60 ohm 100 pf 15 pf 1.0 uf
analog integrated circuit device data ? freescale semiconductor 16 33901 figure 6. can timing diagram figure 7. wake-up pattern timing illustration 0.3 v io txd canh rxd canl v diff dominant recessive 0.9 v 0.5 v 0.7 v io high low high low t loop (r-d) t loop (d-r) (canh - canl) rxd high low t_ wufl1 dominant dominant recessive t_ wufl2 1st event t_ wufl2 t_ tog 2nd event 3rd event t_ tog t_ tog t_ tog bus dominant recessive recessive t_ wuto note: 1st, 2nd and 3rd event must occurs within t_ wuto timing.
analog integrated circuit device data ? freescale semiconductor 17 33901 figure 8. timeout wake-up timing illustration figure 9. txd dominant timeout detection illustration rxd high t_ wufl1 dominant dominant recessive t_w ufl2 1st event 2nd event bus recessive t_ wuto (expired) t_ wufl1 1st event t_ wufl2 2nd event note: only the 1st and the 2nd event occurred within t_ wuto timing. txd high dominant recessive bus txd_dom timeout dominant txd_dom timeout dominant txd_dom timeout low rxd high low txd dom timeout expired recovery condition: txd high
analog integrated circuit device data ? freescale semiconductor 18 33901 5 typical applications 5.1 application diagrams figure 10. single supply typical application schematic figure 11. dual supply typical application schematic figure 12. example of bus termination options mc33901 canh mcu can canl rxd txd vio stb vdd gnd vcc 5.0 v reg. 5.0 v rxd txd controller port_xx v pwr c1 d r1 c1: 1.0 f r1: application dependant (ex: 60, 120 ohm or other value) mc33901 canh mcu can canl rxd txd vio stb vdd gnd vcc 3.3 - 5.0 v rxd txd controller port_xx v pwr 5.0 v reg 3.3-5.0 v reg 5.0 v c1 c2 r1 d c1: 1.0 f r1: application dependant (ex: 60, 120 ohm or other value) c2: 1.0 f r2 r3 canh canl c3 r2, r3: application dependant (ex: 60 ohm or other value): c3: application dependant (ex: 4.7 nf or other value):
analog integrated circuit device data ? freescale semiconductor 19 33901 6 packaging 6.1 package mechanical dimensions package dimensions are provided in package drawings. to find the most current package outline drawing, go to www.freescale.com and perform a keyword sear ch for the drawing?s document number. table 8. packaging information package suffix package outline drawing number 8-pin soicn ef 98asb42564b
analog integrated circuit device data ? freescale semiconductor 20 33901 . ef suffix 8-pin soicn 98asb42564b issue v
analog integrated circuit device data ? freescale semiconductor 21 33901 . ef suffix 8-pin soicn 98asb42564b issue v
analog integrated circuit device data ? freescale semiconductor 22 33901 7 revision history revision date description of changes 1.0 12/2013 ? initial release
document number: mc33901 rev. 1.0 12/2013 information in this document is provided solely to enable sys tem and software implementers to use freescale products. there are no express or implied copyright licenses granted hereunder to design or fabricate any integrated circuits based on the information in this document. freescale reserves the right to make changes without fu rther notice to any products herein. freescale makes no warranty, representation, or guarantee regarding the suitability of its products for any particular purpose, nor does freescale assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. ?typical? parameters that may be provided in freescale data sheets and/or s pecifications can and do vary in diff erent applications, and actual performance may vary over time. all operating parameters, including ?typicals,? must be validated for each customer application by customer?s technical experts. freescale does not convey any license under its patent rights nor the rights of others. freescale sells products pursuant to standard terms and conditi ons of sale, which can be found at the following address: freescale.com/salestermsandconditions . freescale and the freescale logo are trademarks of fr eescale semiconductor, inc., reg. u.s. pat. & tm. off.smartmos is a trademark of freescale semiconductor, in c. all other product or service names are the property of their respective owners. ? 2013 freescale semiconductor, inc. how to reach us: home page: freescale.com web support: freescale.com/support

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